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Pull requests list

[LLVM][CodeGen] Use VSELECT to implement "merging" INSERT_SUBVECTORs. backend:AArch64 llvm:SelectionDAG SelectionDAGISel as well
#172850 opened Dec 18, 2025 by paulwalker-arm Loading…
1
[lldb] Enable chaining multiple scripted frame providers per thread lldb
#172849 opened Dec 18, 2025 by medismailben Loading…
2
[lldb] Add priority support to synthetic frame providers lldb
#172848 opened Dec 18, 2025 by medismailben Loading…
2
[BOLT][Docs] Add instructions to run all tests. BOLT
#172847 opened Dec 18, 2025 by paschalis-mpeis Loading…
5
[MLIR][XeGPU] Add uArch limitation to scatter load store
#172845 opened Dec 18, 2025 by akroviakov • Draft
2
[X86] Ignore invalid features in FMV priority clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#172844 opened Dec 18, 2025 by ecnelises Loading…
1
1
[InstCombine] Add more freeze PHI tests (NFC) llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#172842 opened Dec 18, 2025 by c-rhodes Loading…
2
[llvm-cov] Add show-function-summary option in coverage report
#172839 opened Dec 18, 2025 by ThrownToys Loading…
1
[lldb][windows] refactor the version check in @skipIfWindows lldb platform:windows
#172838 opened Dec 18, 2025 by charles-zablit Loading…
@charles-zablit
7
[AArch64] Add scal_to_vec patterns for SIMD convert intrinsics backend:AArch64
#172837 opened Dec 18, 2025 by Lukacma Loading…
22
Avoid merging instrumentation profiler globals backend:AArch64 llvm:codegen
#172835 opened Dec 18, 2025 by eleviant Loading…
2
[X86][APX] Check APXSave before enabling APX features compiler-rt:builtins compiler-rt
#172834 opened Dec 18, 2025 by phoebewang Loading…
2
[MLIR] Enable dylib init/deinit in execution engine on AArch64 platform mlir:execution-engine mlir
#172833 opened Dec 18, 2025 by castigli Loading…
6
[llvm][ADT] Add llvm::StringRef::consume_front(char) overload llvm:adt
#172832 opened Dec 18, 2025 by Michael137 Loading…
1
[MCA][AArch64] Model single-register EXTR as ROR on Neoverse N2 backend:AArch64
#172831 opened Dec 18, 2025 by Amichaxx Loading…
1
[CodeGen] Add command-line flags for memory operation inline thresholds backend:AArch64 llvm:codegen
#172829 opened Dec 18, 2025 by stuij Loading…
1
[libc++][docs] Update paper and LWG issue lists after 2025-11 Kona documentation libc++ libc++ C++ Standard Library. Not GNU libstdc++. Not libc++abi.
#172825 opened Dec 18, 2025 by frederick-vs-ja Loading…
1
1
[Draft][mlir][x86vector] Shuffle FMAs
#172823 opened Dec 18, 2025 by arun-thmn • Draft
[OFFLOAD][L0] Improve symbol device lookup
#172820 opened Dec 18, 2025 by adurang Loading…
[OFFLOAD][L0] Expose native ELF to upper layers
#172819 opened Dec 18, 2025 by adurang Loading…
1
[OFFLOAD] Recognize level_zero backend in liboffload
#172818 opened Dec 18, 2025 by adurang Loading…
[OFFLOAD][L0] Fix usages of getDebugLevel in L0 plugin
#172815 opened Dec 18, 2025 by adurang Loading…
1
[CIR][X86] Add CIR codegen support for fpclass x86 builtins clang Clang issues not falling into any other category ClangIR Anything related to the ClangIR project
#172813 opened Dec 18, 2025 by jacquesguan Loading…
4
[RISCV][llvm-readobj,llvm-objdump] Use getRISCVVendorRelocationTypeNa… backend:RISC-V llvm:binary-utilities
#172811 opened Dec 18, 2025 by kito-cheng Loading…
3
[LV][doc] Update and extend the docs on floating-point reduction vectorization
#172809 opened Dec 18, 2025 by TiborGY Loading…
2
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